| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
|
132,064 pcs
|
132064 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request | |
|
78 pcs
|
78 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
| Category | |
| Manufacturer Name | |
| Differential | |
| ESD Protection | |
| Frequency | |
| Input | |
| Input Type | |
| Mounting Type | |
| Number of Circuits | |
| Operating Temperature | |
| Output | |
| Propagation Delay | |
| Ratio | |
| Supplier Device Package | |
| Type | |
| Voltage |
The CDCLVP2104RHDR from Texas Instruments is a high-performance, low additive jitter clock buffer. It is designed to generate eight copies of LVPECL clock outputs from two universal inputs, which can accept LVPECL, LVDS, or LVCMOS/LVTTL signals. This device is suitable for a variety of communication applications requiring precise clock distribution.
Key electrical specifications include a maximum clock frequency of 2 GHz, a core supply voltage range of 2.375V to 3.6V, and very low additive jitter of less than 100 fs RMS. The output skew within a bank is a maximum of 15 ps, ensuring signal integrity. The device operates within an industrial temperature range of -40°C to 85°C.
Packaged in a 28-pin VQFN (5x5 mm) with an exposed pad, the CDCLVP2104RHDR is designed for surface mounting. Its dual 1:4 differential buffer architecture makes it efficient for distributing clock signals with minimal skew. ESD protection exceeds 2000 V (HBM).
| Qty | Low | High |
|---|---|---|
| 1+ | $5.31 | $5.31 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
The maximum clock frequency is 2 GHz.
It supports LVCMOS, LVDS, LVPECL, and LVTTL input types.
The output type is LVPECL.
The operating voltage range is 2.375V to 3.6V.
It operates in the temperature range of -40°C to 85°C.
It is supplied in a 28-VQFN (5x5) package.
The additive RMS jitter is less than 100 fs, RMS in the 10-kHz to 20-MHz offset range.