| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
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45,208 pcs
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45208 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request | |
|
7 pcs
|
7 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
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The CDCLVD2102RGTT from Texas Instruments is a dual 1:2 differential clock buffer designed to distribute clock signals with low additive jitter. This device accepts universal inputs including LVDS, LVPECL, and LVCMOS, and outputs LVDS signals compatible with ANSI EIA/TIA-644A standards.
Key electrical specifications include a maximum clock frequency of 800 MHz, a core and output supply voltage range of 2.375V to 2.625V, and low within-bank output skew of 15 ps maximum. The typical additive RMS jitter is rated at 171 fs over a 10-kHz to 20-MHz bandwidth.
This buffer is suitable for driving 50-ohm transmission lines and operates within an industrial temperature range of -40°C to 85°C. The device is packaged in a compact 3mm x 3mm 16-pin VQFN (RGT) package, suitable for surface mounting.
Applications for the CDCLVD2102RGTT include telecommunications, networking, medical imaging, test and measurement equipment, and wireless communications, making it a versatile component for general-purpose clocking needs.
| Qty | Low | High |
|---|---|---|
| 1+ | $4.21 | $4.21 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
The operating temperature range is -40°C to 85°C.
The CDCLVD2102RGTT is available in a 16-VQFN (3x3) package.
The CDCLVD2102RGTT supports LVCMOS, LVDS, and LVPECL input types.
The clock frequency can be up to 800 MHz.
The typical additive RMS jitter is 171 fs.
The output skew is 15 ps.
The device power supply ranges from 2.375V to 2.625V.