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CDC516DGGR The Texas Instruments CDC516DGGR is a 3.3V PLL clock driver designed for synchronous DRAM applications. It distributes one clock input to 16 outputs with low skew and jitter.
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CDC516DGGR

Available from 2 distributors
Mfr Name: Texas Instruments
Texas Instruments
The Texas Instruments CDC516DGGR is a 3.3V PLL clock driver designed for synchronous DRAM applications. It distributes one clock input to 16 outputs with low skew and jitter.
✓ Total Stock: 12,784 pcs

CDC516DGGR Available from 2 distributors

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Unit Electronics Co.,Limited ✓
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11,950 pcs
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11950 pcs On Request 1 On Request On Request On Request On Request On Request
Rayichip ✓
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834 pcs
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834 pcs On Request 1 On Request On Request On Request On Request On Request
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CDC516DGGR Specifications Quick View

Most important parameters for selection – full specs in datasheet.
Category
Manufacturer Name
Differential
Divider
Frequency
Input
Input Type
Mounting Type
Number of Circuits
Number of Outputs
Operating Temperature
Output
PLL
Ratio
Supplier Device Package
Type
Voltage
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CDC516DGGR Description

Short technical summary and product information.

The Texas Instruments CDC516DGGR is a high-performance, low-skew, low-jitter, phase-lock loop (PLL) clock driver. It operates at a 3.3V core and output supply voltage, distributing one clock input to sixteen LVTTL outputs. The device is designed for synchronous DRAM applications and features separate output enable for each of the four banks of four outputs.

 

Key electrical specifications include an additive RMS jitter of 200 fs (typical), an output skew of 200 ps (typical), and a maximum frequency of 125 MHz. The operating temperature range is 0°C to 70°C. The CDC516 includes an on-chip loop filter, eliminating the need for external RC networks, which minimizes component count and board space.

 

Packaged in a 48-TSSOP, the CDC516DGGR is suitable for surface mount applications. The device offers a 1:16 ratio and supports a 3V to 3.6V input voltage range. Its PLL can be bypassed for testing purposes. The output signal duty cycles are adjusted to 50 percent, independent of the input clock duty cycle.

CDC516DGGR Quick Information

Product Type: PLL Clock Driver
Canonical Name: CDC516 3.3V Phase-Lock Loop Clock Driver
Subcategory: PLL Clock Driver

CDC516DGGR Compliance

RoHS Status: RoHS Compliant
Moisture Sensitivity Level (MSL): 1 Unlimited
REACH Status: REACH Unaffected

CDC516DGGR Features

  • 3.3V PLL clock driver with 16 outputs.
  • Low additive jitter and output skew.
  • Operates at frequencies up to 125 MHz.
  • Suitable for synchronous DRAM applications.
  • Packaged in 48-TSSOP for surface mounting.

CDC516DGGR Applications

  • Ideal for clock distribution networks.
  • Used in synchronous DRAM systems.
  • Suitable for high-speed signal routing.
  • Facilitates precise clock alignment.

CDC516DGGR FAQs

6 frequently asked questions generated from this part’s specifications.
What is the core supply voltage for the CDC516DGGR?

The core supply voltage is 3.3V.

What is the operating temperature range of the CDC516DGGR?

The operating temperature range is 0°C to 70°C.

How many outputs does the CDC516DGGR have?

The CDC516DGGR has 16 outputs.

What type of package is the CDC516DGGR supplied in?

The CDC516DGGR is supplied in a 48-TSSOP package.

What is the typical output skew for the CDC516DGGR?

The typical output skew is 200 ps.

Does the CDC516DGGR feature a Phase-Lock Loop (PLL)?

Yes, the CDC516DGGR features a PLL with bypass capability.

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