| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
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18,632 pcs
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18632 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request | |
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274 pcs
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274 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request | |
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2 pcs
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2 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
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The Texas Instruments CD74HC112PWR is a high-speed CMOS logic device featuring dual negative-edge-triggered JK flip-flops with independent set and reset inputs. This component offers complementary outputs and buffered inputs, ensuring reliable signal integrity.
Key electrical characteristics include an operating voltage range of 2V to 6V and a maximum clock frequency of 60MHz at typical conditions. The device exhibits a low quiescent current of 4 µA and supports standard outputs with a fanout of 10 LSTTL loads. Propagation delay is specified at a maximum of 30ns at 6V with a 50pF load.
Designed for a wide operating temperature range from -55°C to 125°C, the CD74HC112PWR is suitable for various environmental conditions. It is available in a 16-TSSOP surface mount package, facilitating integration into compact electronic designs.
This flip-flop is ideal for digital logic applications requiring state storage and sequencing, such as counters, registers, and control circuits. Its CMOS technology provides significant power reduction compared to LSTTL logic ICs while maintaining equivalent operating speeds.
| Qty | Low | High |
|---|---|---|
| 1+ | $0.20 | $0.20 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
The operating voltage range is 2V to 6V.
The CD74HC112PWR is available in a 16-TSSOP (Thin Shrink Small Outline Package) with a 4.40mm width.
The operating temperature range is -55°C to 125°C.
The typical maximum clock frequency is 60 MHz at VCC = 5V, CL = 15pF, TA = 25°C.
The maximum propagation delay is 30 ns at 6V, 50pF.
The flip-flop is triggered on the negative (falling) edge of the clock signal.
The flip-flop includes set (preset) and reset functions.