CD54HCT112F3A The Harris Semiconductor CD54HCT112F3A is a Dual J-K Flip-Flop featuring asynchronous Set and Reset inputs and complementary outputs. It operates with a supply voltage range of 4.5V to 5.5V.
Mfr Part #:

CD54HCT112F3A

Available from 1 distributors
Mfr Name: Harris Semiconductor
Harris Semiconductor
The Harris Semiconductor CD54HCT112F3A is a Dual J-K Flip-Flop featuring asynchronous Set and Reset inputs and complementary outputs. It operates with a supply voltage range of 4.5V to 5.5V.
✓ Total Stock: 10 pcs
$ Price Range: $0.50

CD54HCT112F3A Available from 1 distributor

✓ Authorised
✓ Non-Authorised
Distributor Stock Pricing MOQ PKG Lead Time Date Code On Order Quantity On Order Delivery
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10 pcs
10 pcs On Request 1 On Request On Request 92 On Request On Request

CD54HCT112F3A Specifications Quick View

Most important parameters for selection – full specs in datasheet.
Category
Manufacturer Name
Load Capacitance
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Operating Voltage

CD54HCT112F3A Description

Short technical summary and product information.

The CD54HCT112F3A from Harris Semiconductor is a dual J-K flip-flop integrated circuit designed for digital logic applications. It utilizes silicon-gate CMOS technology, offering operating speeds comparable to LSTTL parts while maintaining low power consumption. This device features independent J, K, Set, Reset, and Clock inputs, along with Q and Q outputs. State changes occur on the negative-going transition of the clock pulse, and Set/Reset functions are asynchronous, activated by low-level inputs.

 

The flip-flop is specified for a wide operating temperature range of -55°C to 125°C and operates with a nominal supply voltage of 5V, with a range from 4.5V to 5.5V. It supports a maximum operating frequency of 20MHz. The device offers standard outputs with a fanout of 10 LSTTL loads and bus driver outputs with a fanout of 15 LSTTL loads. The CD54HCT112F3A is packaged in a 16-lead CERDIP with through-hole mounting.

 

Key electrical characteristics include a typical operating voltage of 5V and a maximum output current of 4mA. The load capacitance is specified at 50pF. The HCT logic family ensures functional and pin compatibility with standard LS logic families, making it suitable for direct integration into existing designs.

CD54HCT112F3A Quick Information

Product Type: Dual J-K Flip-Flop
Canonical Name: Dual J-K Flip-Flop with Set and Reset
Subcategory: J-K Flip-Flop

CD54HCT112F3A Compliance

RoHS Status: RoHS Compliant
Moisture Sensitivity Level (MSL): 1 Unlimited
REACH Status: REACH Unaffected

CD54HCT112F3A Estimated Pricing

Qty Low High
1+ $0.50 $0.50

Estimated market price range - modelled values for guidance only, not live distributor offers.

CD54HCT112F3A Features

  • Dual J-K flip-flop with set and reset.
  • Negative-edge triggered clock input.
  • Complementary Q and Q outputs.
  • Wide operating temperature range: -55°C to 125°C.
  • Operates from 4.5V to 5.5V supply voltage.

CD54HCT112F3A Applications

  • Digital logic state storage.
  • Sequential circuit design.
  • Control signal generation.
  • Data synchronization tasks.

CD54HCT112F3A FAQs

4 frequently asked questions generated from this part’s specifications.
What is the operating voltage range for the CD54HCT112F3A?

The CD54HCT112F3A operates with a supply voltage range from 4.5V to 5.5V, with a nominal value of 5V.

What is the operating temperature range for this J-K flip-flop?

This device is designed to operate within a wide temperature range, from -55°C to 125°C.

What is the maximum operating frequency of the CD54HCT112F3A?

The maximum operating frequency is typically 60MHz at 5V with a 15pF load, and 20MHz based on manufacturer page data.

What type of package is the CD54HCT112F3A in?

The CD54HCT112F3A is supplied in a 16-lead CERDIP package.

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