| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
|
2,020 pcs
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2020 pcs | On Request | 1 | On Request | On Request | 24+ | On Request | On Request |
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| Manufacturer Name | |
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| Tape & Reel |
The CD54HC112F3A from Texas Instruments is a dual J-K flip-flop designed with silicon-gate CMOS technology, achieving speeds comparable to LSTTL parts while maintaining low power consumption. This device features independent J, K, Set, Reset, and Clock inputs, along with Q and Q outputs. State changes occur on the negative-going transition of the clock pulse, and Set/Reset functions are asynchronous, activated by low-level inputs.
Key electrical characteristics include a typical maximum clock frequency of 60MHz at 5V supply and 15pF load capacitance. The device supports a wide operating voltage range from 2V to 6V for HC types and 4.5V to 5.5V for HCT types. Standard outputs can drive 10 LSTTL loads, while bus driver outputs can drive 15 LSTTL loads. It operates across a broad temperature range of -55°C to 125°C.
The flip-flop incorporates hysteresis on clock inputs for improved noise immunity and increased input rise and fall times. Buffered inputs ensure signal integrity. The HCT logic family is functionally and pin-compatible with standard LS logic families, facilitating integration into existing designs.
Available in various package types including CERDIP, PDIP, SOIC, SOP, and TSSOP, the CD54HC112F3A is suitable for through-hole mounting. Its design makes it a versatile component for digital logic applications requiring reliable flip-flop functionality.
| Qty | Low | High |
|---|---|---|
| 1+ | $1.20 | $1.20 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
The typical maximum clock frequency is 60MHz at VCC = 5V, CL = 15pF, and TA = 25°C.
The operating temperature range is -55°C to 125°C.
HC types operate from 2V to 6V, and HCT types operate from 4.5V to 5.5V.
Standard outputs can drive 10 LSTTL loads, and bus driver outputs can drive 15 LSTTL loads.
Available package types include CERDIP, PDIP, SOIC, SOP, and TSSOP.