| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
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200 pcs
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200 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
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The AZ100ELT23DGR2 from AZ Microtek is a dual differential PECL to CMOS/TTL translator. Designed for applications requiring the translation of clock and data signals, it utilizes PECL (Positive ECL) levels, requiring only VCC and ground.
Key electrical characteristics include a typical propagation delay of 3.5ns and a typical output to output skew of less than 500ps. It features differential PECL inputs and CMOS/TTL outputs, with a flow-through pinout design.
This translator is suitable for LVPECL to LVCMOS/LVTTL translations and general PECL to CMOS/TTL translations. It comes in a small outline 8-lead package, making it ideal for space-constrained designs.
| Qty | Low | High |
|---|---|---|
| 1+ | $0.12 | $0.12 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
The typical propagation delay for the AZ100ELT23DGR2 is 3.5ns.
The typical output to output skew for the AZ100ELT23DGR2 is less than 500ps.
The AZ100ELT23DGR2 has differential PECL inputs.
The AZ100ELT23DGR2 has CMOS/TTL outputs.
The AZ100ELT23DGR2 is available in an 8-lead package.