| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
|
200 pcs
|
200 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
| Category | |
| Manufacturer Name | |
| SVHC Present |
The AZ100ELT23DGR2 by Arizona Microtek Inc is a Dual Differential PECL to CMOS/TTL Translator designed for efficient signal level conversion. It operates using PECL (Positive ECL) levels, requiring only VCC and ground for functionality.
Key electrical characteristics include a typical propagation delay of 3.5ns and a typical output to output skew of less than 500ps. The device features differential PECL inputs and CMOS/TTL outputs, making it suitable for translating clock and data signals.
This translator is housed in a compact 8-lead package, ideal for applications where space is a constraint. Its flow-through pinouts facilitate easier board layout. The AZ100ELT23DGR2 is well-suited for LVPECL to LVCMOS/LVTTL translations and general PECL to CMOS/TTL translation tasks.
| Qty | Low | High |
|---|---|---|
| 1+ | $0.12 | $0.12 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
The typical propagation delay is 3.5 ns.
The typical output to output skew is less than 500 ps.
It features differential PECL inputs.
It provides CMOS/TTL outputs.
The package type is 8-lead.