| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
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1,755 pcs
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1755 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
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The Alliance AS4C128M16D2-25BIN is a high-performance DDRII Synchronous DRAM (SDRAM) designed for high-speed data transfer rates. It features a 400 MHz system frequency, achieving data transfer rates of up to 800 Mbps/pin. This memory device is organized as 8 banks x 16Mbit x 16, utilizing an 8-bank architecture for concurrent operation.
Key features include a 4-bit prefetch architecture, programmable CAS Latency (3, 4, 5, 6, 7), and programmable Additive Latency (0-6). The device supports write latency equal to read latency minus one. It offers programmable wrap sequences (Sequential or Interleave) and programmable burst lengths of 4 and 8.
Operating with a JEDEC standard power supply of 1.8V ± 0.1V for both VDD and VDDQ, the AS4C128M16D2-25BIN is suitable for a wide range of applications. It includes features like Power Down Mode, Auto Refresh, Self Refresh, and Partial Array Self Refresh (PASR). The memory operates within a case temperature range of 0°C to 85°C.
This component is available in an 84-ball FBGA package. It also incorporates On-Die Termination (ODT) and a weak strength data-output driver option. The device features bidirectional differential data strobes (DQS, DQS) and differential clock inputs (CK, CK) for reliable signal integrity. An on-chip DLL aligns DQ and DQS transitions with CK transitions.
| Qty | Low | High |
|---|---|---|
| 1+ | $1.28 | $1.28 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
It is organized as 8 banks x 16Mbit x 16, providing 128M x 16 bit total memory.
The data rate is 800 Mbps/pin with a 400 MHz clock frequency.
The nominal VDD and VDDQ supply voltage is 1.8V.
The case temperature (Tcase) range is 0°C to 85°C.
It is available in an 84-ball FBGA package.
Programmable CAS latencies of 3, 4, 5, 6, and 7 are supported.
The refresh interval is 7.8 us (8192 cycles/64 ms).