| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
|
6,358 pcs
|
6358 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request | |
|
2,100 pcs
|
2100 pcs | On Request | 1 | On Request | On Request | 24+ | On Request | On Request |
| Category | |
| Manufacturer Name | |
| Clock Rate | |
| Interface | |
| Mounting Type | |
| Non | |
| On | |
| Operating Temperature | |
| Supplier Device Package | |
| Type | |
| Voltage |
The ADSP-21062CSZ-160 is a high-performance 32-bit floating point digital signal processor from the SHARC family by Analog Devices. It features a Super Harvard Architecture with four independent buses for dual data fetch, instruction fetch, and nonintrusive I/O. The processor core delivers 40 MIPS at a 25 ns instruction rate, with peak performance of 120 MFLOPS and sustained performance of 80 MFLOPS. It includes dual-ported on-chip SRAM of 256 kB and integrated I/O peripherals such as host interface, link ports, and serial ports. The device operates with a 5.00 V I/O and core voltage, and supports an operating temperature range of -40°C to 100°C (TC). It is packaged in a 240-lead BFQFP with exposed pad (240-MQFP-EP 32x32) for surface mount assembly. The ADSP-21062CSZ-160 is designed for communications, graphics, and imaging applications requiring high computational throughput. It supports IEEE JTAG standard 1149.1 for on-chip emulation and is RoHS compliant.
The I/O and core supply voltage are both 5.00 V nominal.
It is available in a 240-BFQFP Exposed Pad package, also specified as 240-MQFP-EP (32x32).
-40°C to 100°C (TC).
Yes, it is RoHS3 compliant.
The clock rate is 40 MHz, providing 40 MIPS with a 25 ns instruction cycle.
256 kB of dual-ported on-chip SRAM.
Host interface, link ports, and serial ports.