| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
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2,820 pcs
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2820 pcs | On Request | 1 | On Request | On Request | 25+ | On Request | On Request | |
|
1,718 pcs
|
1718 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
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The ADS9224RIRHBR is a 16-bit, 3-MSPS, dual-channel, simultaneous-sampling SAR analog-to-digital converter from Texas Instruments. It integrates an internal reference and reference buffers, and supports both SPI and enhanced SPI interfaces for communication with microcontrollers and FPGAs. The device accepts differential input signals over a 0 V to 5.5 V input voltage range.
Key electrical specifications include a typical SNR of 93.5 dB, 94 dB SNR at 1 MHz, -109 dB THD, and 88 dB SINAD at 1 MHz. The ADC operates from a 4.5 V to 5.5 V analog supply and a 1.65 V to 5.5 V digital supply, with typical power consumption of 120 mW. The converter provides 16-bit no-missing-code DNL and ±2 LSB maximum INL, and supports a wide operating temperature range from -40°C to +125°C.
The device is housed in a 32-VFQFN exposed-pad package (5 mm x 5 mm) and uses surface-mount assembly. The simultaneous-sampling architecture enables synchronized acquisition on two differential channels, which is useful in systems that need low-latency, multi-channel data conversion.
| Qty | Low | High |
|---|---|---|
| 1+ | $11.07 | $11.07 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
The analog supply operates from 4.5 V to 5.5 V; the digital supply operates from 1.65 V to 5.5 V.
A 32-VFQFN exposed pad package, also referenced as 32-VQFN (5 mm x 5 mm), for surface-mount assembly.
-40°C to +125°C.
The existing database records list it as RoHS3 Compliant; however, this status is unverified and should be confirmed with the manufacturer.
The maximum sampling rate is 3 MSPS (3,000,000 samples per second).
Yes, it has two input channels with a simultaneous-sampling architecture.
It supports SPI and enhanced SPI interfaces.