| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
|
9,318 pcs
|
9318 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request | |
|
32 pcs
|
32 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
| Category | |
| Manufacturer Name | |
| Analog Input Bandwidth | |
| Architecture | |
| Channel Isolation | |
| Configuration | |
| Data Interface | |
| ENOB | |
| Features | |
| Input Bandwidth | |
| Input Buffer | |
| Input Full Scale | |
| Input Type | |
| Integrated Wideband DDC Block | |
| Interface Type | |
| Mounting Type | |
| Multi-Chip Synchronization | |
| Noise Floor | |
| Number of A | |
| Number of Bits | |
| Number of Input Channels | |
| Number of Inputs | |
| On-chip Dither | |
| Operating Temperature | |
| Peak-to-Peak Input Voltage Range | |
| Power Consumption | |
| Power Dissipation | |
| Ratio | |
| Reference Type | |
| Resolution | |
| Sample Rate | |
| Sampling Rate (Per Second) | |
| Supplier Device Package | |
| Voltage | |
| jesd204b_lanes (@ 10.0 Gbps) | |
| jesd204b_lanes (@ 5.0 Gbps) | |
| sfdr (Nominal @ f_IN = 170 MHz at -1 dBFS (except HD 2, HD 3, and interleaving tones) | |
| sfdr (Nominal @ f_IN = 170 MHz at -1 dBFS (including interleaving tones) | |
| sfdr (Nominal @ f_IN = 350 MHz at -1 dBFS (except HD 2, HD 3, and interleaving tones) | |
| sfdr (Nominal @ f_IN = 350 MHz at -1 dBFS) | |
| snr (Nominal @ f_IN = 170 MHz at -1 dBFS) | |
| snr (Nominal @ f_IN = 350 MHz at -1 dBFS) |
The ADS54J60IRMP from Texas Instruments is a high-performance, dual-channel, 16-bit Analog-to-Digital Converter (ADC) designed for ultra-high-speed applications. It offers a maximum sample rate of 1.0 GSPS and a wide analog input bandwidth of 1.2 GHz, making it suitable for demanding signal processing tasks.
Key electrical specifications include a typical power consumption of 2700 mW and a peak-to-peak input voltage range of 1.9 V. The ADC utilizes a pipelined architecture and supports an external reference type. It provides a Signal-to-Noise Ratio (SNR) of 70 dBFS and a Spurious-Free Dynamic Range (SFDR) of up to 89 dBc at 170 MHz input frequency.
The device features a JESD204B interface with subclass 1 support, offering flexible lane configurations at 10.0 Gbps or 5.0 Gbps for efficient data transfer. It also includes an input buffer, on-chip dither, and an integrated wideband DDC block. Support for multi-chip synchronization is also provided.
The ADS54J60IRMP is available in a 72-pin VQFNP exposed pad package, designed for surface mounting. It operates within a temperature range of -40°C to 85°C.
| Qty | Low | High |
|---|---|---|
| 1+ | $832.86 | $832.86 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
The maximum sample rate for the ADS54J60IRMP is 1000 MSPS (1.0 GSPS).
The ADS54J60IRMP has a resolution of 16 bits.
The ADS54J60IRMP features 2 input channels.
The ADS54J60IRMP utilizes the JESD204B interface.
The operating temperature range is -40°C to 85°C.
The ADS54J60IRMP is supplied in a 72-VQFN (10x10) package for surface mounting.
The RoHS status is RoHS3 Compliant.