| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
|
2,002 pcs
|
2002 pcs | On Request | 1 | On Request | On Request | 24+ | On Request | On Request |
| Category | |
| Manufacturer Name | |
| Bandwidth | |
| Differential | |
| Frequency | |
| Input | |
| Main Purpose | |
| Mounting Type | |
| Operating Temperature | |
| Output | |
| PLL | |
| Power Dissipation | |
| Ratio | |
| SVHC Present | |
| Supplier Device Package | |
| Voltage |
The ADN2811ACP-CML is a clock and data recovery (CDR) IC from Analog Devices designed for SONET OC-48 and SDH STM-16 applications, including FEC rates. It integrates quantization, signal level detection, and clock recovery functions.
Key electrical specifications include a supply voltage range of 3V to 3.6V (3.3V typical), typical power dissipation of 540 mW, and a maximum data rate of 2.66 Gbps. The device features CML inputs and outputs, a 1:2 input-to-output ratio, and an integrated PLL. It offers a quantizer sensitivity of 4 mV typical and an adjustable slice level range of ±100 mV. The minimum bandwidth is 1.9 GHz, and the loss of signal detect threshold ranges from 3 mV to 15 mV. Supported reference clock frequencies include 19.44 MHz, 38.88 MHz, 77.76 MHz, and 155.52 MHz.
The device is housed in a 48-lead LFCSP package measuring 7mm x 7mm, with surface mount mounting. It operates over a temperature range of -40°C to +85°C. The packaging method is bag. The device is RoHS3 compliant (unverified) and has an MSL of 1 (Unlimited).
The ADN2811ACP-CML is suitable for use in WDM transponders, regenerators, repeaters, test equipment, and backplane applications. It meets all SONET jitter requirements including jitter transfer, generation, and tolerance.
3V to 3.6V (3.3V typical).
48-lead LFCSP (7x7 mm).
-40°C to +85°C.
RoHS3 Compliant (unverified).
2.66 Gbps.
540 mW typical.
CML for both input and output.