| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
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4,450 pcs
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4450 pcs | On Request | 1 | On Request | On Request | 24+ | On Request | On Request |
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| Differential | |
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The ADCLK954BCPZ is an ultrafast clock fanout buffer fabricated on Analog Devices' proprietary XFCB3 SiGe bipolar process. It features two selectable differential inputs controlled via the IN_SEL pin, each with on-chip 100 Ω differential termination resistors. The device accepts DC-coupled LVPECL, CML, and 3.3 V CMOS signals, as well as AC-coupled 1.8 V CMOS, LVDS, and LVPECL inputs. A VREFx pin is provided for biasing AC-coupled inputs.
The ADCLK954BCPZ provides 12 full-swing LVPECL output drivers, with a maximum operating frequency of 4.8 GHz and ultra-low broadband random jitter of 75 fs rms. It operates from a 3.3 V supply (2.97 V to 3.63 V) over the industrial temperature range of -40°C to +85°C. The outputs can be configured for LVPECL or ECL operation by appropriate biasing of VCC and VEE.
The device is housed in a 40-lead LFCSP (6 mm × 6 mm) with exposed pad for thermal management, and is surface-mount compatible. Applications include low-jitter clock distribution, clock and data signal restoration, level translation, and use in wireless and wired communications, medical imaging, ATE, and high-performance instrumentation.
The supply voltage range is 2.97 V to 3.63 V.
It is available in a 40-VFQFN Exposed Pad, CSP package, also known as 40-LFCSP-VQ (6x6).
The operating temperature range is -40°C to 85°C.
The part is marked as RoHS3 Compliant, but this has not been independently verified.
The maximum frequency is 4.8 GHz.
The inputs accept CMOS, LVDS, and LVPECL differential signals.
The broadband random jitter is 75 fs rms.