| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
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2,349 pcs
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2349 pcs | On Request | 1 | On Request | On Request | 24+ | On Request | On Request |
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The AD9650BCPZ-65 is a dual, 16-bit, 65 MSPS analog-to-digital converter (ADC) from Analog Devices. It uses a multistage differential pipelined architecture with output error correction logic to digitize high-frequency signals up to 300 MHz. The device operates from a 1.7V to 1.9V analog supply and provides a typical SNR of 83 dBFS and SFDR of 95 dBc at a 9.7 MHz input and 25 MSPS. Power dissipation is 119 mW per channel at 25 MSPS.
The ADC includes two differential analog inputs with a 2.7 V p-p range and 500 MHz bandwidth. It supports both external and internal voltage references and offers LVDS or parallel CMOS data interfaces. A duty cycle stabilizer compensates for clock variations. The device is housed in a 64-VFQFN exposed pad package (64-LFCSP-VQ, 9x9 mm) for surface-mount assembly and operates over -40°C to +85°C.
The AD9650BCPZ-65 has a 16-bit resolution.
The maximum sampling rate is 65 MSPS.
The operating temperature range is -40°C to +85°C.
It comes in a 64-VFQFN Exposed Pad package (64-LFCSP-VQ, 9x9 mm).
The part is listed as RoHS3 compliant, though this is unverified.
Typical SNR is 83 dBFS at 9.7 MHz input and 25 MSPS.
The supply voltage range is 1.7V to 1.9V.