| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
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2,006 pcs
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2006 pcs | On Request | 1 | On Request | On Request | 24+ | On Request | On Request | |
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2,000 pcs
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2000 pcs | On Request | 1 | On Request | On Request | On Request | On Request | 2026-02-23 21:33:16 |
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| Manufacturer Name | |
| Differential | |
| Divider | |
| Frequency | |
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| Operating Temperature | |
| Output | |
| PLL | |
| Ratio | |
| Supplier Device Package | |
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| Voltage |
The AD9540BCPZ is a 655 MHz low jitter clock generator from Analog Devices that integrates a phase-locked loop (PLL) and a direct digital synthesizer (DDS) core. It accepts a clock input and provides differential CML and PECL outputs. The device includes a 200 MHz phase frequency detector (PFD) with programmable input dividers (M, N) and an RF divider (R). The internal DDS operates at 400 MSPS with 48-bit frequency tuning word resolution and 14-bit programmable phase offset.
This clock generator operates from a 1.8V core supply and a separate 3.3V I/O supply for the output drivers and charge pump. It is housed in a 48-lead LFCSP package (7x7 mm) with an exposed pad for thermal management. The device supports surface mount assembly and is specified for the -40°C to +85°C industrial temperature range.
Typical applications include clocking high performance data converters, base station clocking, network (SONET/SDH) and Gigabit Ethernet clocking, instrumentation, and agile local oscillator frequency synthesis. The programmable charge pump current and dual-mode lock detect provide flexibility for various PLL loop filter designs.
The maximum output frequency is 655 MHz.
The core supply voltage range is 1.71V to 1.89V, and the I/O supply is 3.3V.
It is available in a 48-lead LFCSP package (48-LFCSP-VQ 7x7 mm) with an exposed pad.
The operating temperature range is -40°C to +85°C.
It provides differential CML and PECL outputs.
Yes, it includes an integrated PLL with a 200 MHz phase frequency detector.
The frequency tuning word resolution is 48-bit.