| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
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2,336 pcs
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2336 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
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| Differential | |
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| PLL | |
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The AD9517-3ABCPZ is a high-performance clock generator and fanout distribution IC from Analog Devices. It integrates a phase-locked loop (PLL) with an on-chip VCO that tunes from 1.75 GHz to 2.25 GHz, and also supports an external VCO/VCXO up to 2.4 GHz. The device accepts CMOS, LVDS, or LVPECL reference inputs and provides 12 outputs configurable as LVPECL (up to 1.6 GHz), LVDS (up to 800 MHz), or CMOS (up to 250 MHz when LVDS outputs are reconfigured).
Key electrical characteristics include additive jitter of 225 fs rms for LVPECL outputs and 275 fs rms for LVDS outputs, with channel-to-channel skew under 10 ps for paired LVPECL outputs. The supply voltage range is 3.135 V to 3.465 V, and the operating temperature range is -40°C to 85°C. The device features programmable dividers, coarse phase delay, and fine delay adjust on LVDS outputs, along with automatic output synchronization on power-up.
The AD9517-3ABCPZ is housed in a 48-lead LFCSP (7x7 mm) package with an exposed pad for thermal management. It is designed for low-jitter clock distribution in applications such as 10/40/100 Gb/sec networking line cards, SONET, Synchronous Ethernet, and clocking high-speed ADCs, DACs, and wireless transceivers.
The supply voltage range is 3.135 V to 3.465 V.
It is available in a 48-lead LFCSP (7x7 mm) package with exposed pad.
The operating temperature range is -40°C to 85°C.
It is listed as RoHS3 Compliant, but this is unverified.
The maximum LVPECL output frequency is 1.6 GHz.
It has 12 outputs: 4 LVPECL, 4 LVDS (each can be reconfigured as 2 CMOS).
The additive jitter for LVPECL outputs is 225 fs rms typical.