AD9511BCPZ

The AD9511BCPZ is a high-performance clock distribution IC from Analog Devices, integrating a low phase noise phase-locked loop (PLL) core with programmable dividers and multiple output types. It accepts reference inputs up to 250 MHz and differential clock inputs up to 1.6 GHz.

It provides five outputs: three independent LVPECL outputs capable of up to 1.2 GHz with additive jitter of 225 fs rms, and two independent LVDS/CMOS outputs (LVDS up to 800 MHz, CMOS up to 250 MHz) with additive jitter of 275 fs rms. Each output has a programmable divider (1 to 32, all integers) and phase select for coarse delay adjustment.

The device includes a serial control port for configuration, a programmable charge pump with separate supply (VCPS) for extended tuning range, and fine delay adjust on one LVDS/CMOS output. It operates from a 3.135V to 3.465V supply and over -40°C to +85°C.

Housed in a 48-lead LFCSP (7x7 mm) with exposed pad for thermal management, surface mount. Suitable for low jitter clock distribution in high-speed ADCs, DACs, wireless transceivers, and instrumentation.