| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
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7,948 pcs
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7948 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request | |
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6,898 pcs
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6898 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
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The AD9268BCPZ-125 is a dual 16-bit analog-to-digital converter (ADC) from Analog Devices, designed for high-speed data acquisition applications. It supports a maximum sampling rate of 125 MSPS and uses a pipelined architecture to achieve high throughput. The device accepts differential analog inputs with a bandwidth of 650 MHz and offers a flexible input range of 1 V p-p to 2 V p-p.
Key electrical specifications include a typical signal-to-noise ratio (SNR) of 78.2 dBFS and spurious-free dynamic range (SFDR) of 88 dBc at 70 MHz input frequency and 125 MSPS. Power consumption is typically 750 mW at full speed. The ADC operates from an analog supply of 1.7 V to 1.9 V and a digital supply of 1.8 V. Additional features include an optional on-chip dither, integer 1-to-8 clock divider, duty cycle stabilizer, built-in self-test (BIST), and serial port control.
The AD9268BCPZ-125 is housed in a 64-lead LFCSP-VQ (9x9 mm) package with an exposed pad for thermal management. It is surface-mountable and specified for operation from -40°C to +85°C. The device is suitable for communications infrastructure, multimode digital receivers, I/Q demodulation, and ultrasound equipment.
16-bit resolution, maximum sampling rate 125 MSPS.
SNR 78.2 dBFS, SFDR 88 dBc at 70 MHz input and 125 MSPS.
750 mW at 125 MSPS.
-40°C to 85°C.
64-VFQFN Exposed Pad, CSP; supplier package 64-LFCSP-VQ (9x9 mm).
1.7 V to 1.9 V.
RoHS3 compliant (unverified).