| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
|
11,096 pcs
|
11096 pcs | On Request | 1 | On Request | On Request | 24+ | On Request | On Request | |
|
1,900 pcs
|
1900 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
| Category | |
| Manufacturer Name | |
| Analog Input Bandwidth | |
| Analog Input Voltage Range | |
| Analog Supply Voltage | |
| Architecture | |
| Configuration | |
| Data Interface | |
| Differential Nonlinearity (DNL) | |
| Digital Output Supply Voltage | |
| Features | |
| Input Type | |
| Mounting Type | |
| Number of A | |
| Number of Bits | |
| Number of Inputs | |
| Operating Temperature | |
| Power Dissipation (Typical @ 20 MSPS per channel) | |
| Power Dissipation (Typical @ 80 MSPS per channel) | |
| Ratio | |
| Reference Type | |
| SFDR (Typical @ 200 MHz input) | |
| SFDR (Typical @ 9.7 MHz input) | |
| SNR (Typical @ 200 MHz input) | |
| SNR (Typical @ 9.7 MHz input) | |
| SVHC Present | |
| Sampling Rate (Per Second) | |
| Supplier Device Package | |
| Voltage |
The AD9251BCPZ-80 is a dual-channel, 14-bit analog-to-digital converter (ADC) with a maximum sampling rate of 80 MSPS per channel. It employs a pipelined architecture with a sample-and-hold circuit, providing a 1:1 S/H:ADC ratio. The device supports differential inputs with a 700 MHz analog input bandwidth and a 2 V p-p input voltage range.
Electrical performance includes a typical SNR of 74.3 dBFS at 9.7 MHz input and 71.5 dBFS at 200 MHz input, with SFDR of 93 dBc and 80 dBc respectively. Power dissipation is 73 mW per channel at 80 MSPS, and it operates from a 1.8 V analog supply with a digital output supply range of 1.8 V to 3.3 V. The reference type is both external and internal.
The ADC is housed in a 64-VFQFN Exposed Pad, CSP package (64-LFCSP-VQ 9x9) for surface mount mounting. It operates over the temperature range of -40°C to 85°C. The parallel data interface simplifies connection to digital processors.
Typical applications include diversity radio systems, multimode digital receivers, I/Q demodulation systems, smart antenna systems, battery-powered instruments, and portable medical imaging. The device also features simultaneous sampling and a programmable clock duty cycle stabilizer.
The analog supply voltage is 1.8 V, and the digital output supply voltage ranges from 1.8 V to 3.3 V.
It is available in a 64-VFQFN Exposed Pad, CSP package, specifically the 64-LFCSP-VQ (9x9) surface mount package.
-40°C to 85°C.
According to the database, it is RoHS3 compliant, but this is unverified and should be confirmed.
80 MSPS per channel.
14 bits.
74.3 dBFS at 9.7 MHz input and 71.5 dBFS at 200 MHz input.