| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
|
2,200 pcs
|
2200 pcs | On Request | 1 | On Request | On Request | 24+ | On Request | On Request |
| Category | |
| Manufacturer Name | |
| Analog Input Bandwidth | |
| Analog Input Range | |
| Analog Supply Voltage | |
| Channel Isolation/Crosstalk | |
| Crosstalk | |
| Frequency | |
| Function | |
| IF Sampling Frequency | |
| Input Clock Divider | |
| Mounting Type | |
| Output Supply Voltage (@ CMOS) | |
| Output Supply Voltage (Nominal @ LVDS) | |
| RF Type | |
| Sample Rate | |
| Secondary Attributes | |
| Signal To Noise Ratio (Typical @ 70 MHz, 32.7 MHz BW, 150 MSPS) | |
| Signal To Noise Ratio (Typical @ fIN = 140 MHz) | |
| Signal To Noise Ratio (Typical @ fIN = 70 MHz) | |
| Spurious Free Dynamic Range (Minimum @ 70 MHz, 150 MSPS) | |
| Spurious Free Dynamic Range (Typical @ fIN = 140 MHz) | |
| Spurious Free Dynamic Range (Typical @ fIN = 70 MHz) | |
| Supplier Device Package | |
| Supplier Package | |
| Two Tone Sfdr (Typical @ fIN = 169.12 MHz, 172.12 MHz (−7 dBFS) | |
| Two Tone Sfdr (Typical @ fIN = 29.12 MHz, 32.12 MHz (−7 dBFS) |
The AD6655BCPZ-105 from Analog Devices is a high-performance IF Diversity Receiver integrated circuit designed for advanced communication systems. It features a dual-channel, 14-bit Analog-to-Digital Converter (ADC) capable of sample rates up to 150 MSPS, with IF sampling frequencies reaching 450 MHz.
Key electrical specifications include a 1.8V analog supply operation, flexible CMOS or LVDS output supply options, and an integrated wideband digital downconverter (DDC) with a 32-bit complex numerically controlled oscillator (NCO). The device offers excellent performance metrics such as a Signal-to-Noise Ratio (SNR) of 74.5 dBc and a Spurious-Free Dynamic Range (SFDR) of 80 dBc at 70 MHz and 150 MSPS. It also provides 95 dB of channel isolation/crosstalk.
This receiver IC supports various applications including diversity radio systems, multimode digital receivers (3G), TD-SCDMA, WiMax, WCDMA, CDMA2000, GSM, EDGE, LTE I/Q demodulation systems, smart antenna systems, general-purpose software radios, and broadband data applications. The AD6655BCPZ-105 is housed in a 64-lead LFCSP-VQ (9x9) package and is designed for surface mount applications.
Additional features include an integer 1-to-8 input clock divider, an internal ADC voltage reference, flexible analog input range from 1 V p-p to 2 V p-p, and an ADC clock duty cycle stabilizer. Energy-saving power-down modes are also incorporated.
| Qty | Low | High |
|---|---|---|
| 1+ | $0.99 | $0.99 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
The maximum sample rate is 105 MSPS.
The analog input bandwidth is 650 MHz.
It is packaged in a 64-VFQFN Exposed Pad, CSP.
It operates with a 1.8 V analog supply voltage.
The channel isolation is 95 dB.