| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
|
2,840 pcs
|
2840 pcs | On Request | 1 | On Request | On Request | 24+ | On Request | On Request |
| Category | |
| Manufacturer Name | |
| ADC Resolution | |
| Analog Input Bandwidth | |
| Analog Input Range | |
| Analog Supply Voltage | |
| Built-In Self-Test (BIST) | |
| Channel Isolation/Crosstalk | |
| Clock Divider | |
| Clock Divider (Nominal) | |
| Function | |
| Lead Spacing | |
| Mounting Type | |
| Multichip Sync | |
| Noise Shaping Requantizer (NSR) | |
| Output Data Rate | |
| Output Type | |
| Power Consumption | |
| Power-Down Modes | |
| RF Type | |
| Secondary Attributes | |
| Serial Port Interface | |
| Signal To Noise Ratio (Typical @ NSR disabled, to 70 MHz @ 185 MSPS) | |
| Signal To Noise Ratio (Typical @ NSR enabled, 40 MHz band to 70 MHz @ 185 MSPS) | |
| Signal To Noise Ratio (Typical @ NSR enabled, 60 MHz band to 70 MHz @ 185 MSPS) | |
| Spurious-Free Dynamic Range (SFDR) | |
| Supplier Device Package | |
| Supplier Package |
The AD6642BBCZ from Analog Devices is a high-performance dual IF receiver integrated circuit designed for demanding communication applications. It features an 11-bit resolution and supports output data rates up to 200 MSPS, making it suitable for high-speed digital signal processing.
Key electrical specifications include a low power consumption of 0.62 W at 185 MSPS and operation from a single 1.8V analog supply. The device offers an analog input range of 1.75 V p-p, programmable to 2.0 V p-p, with differential analog inputs boasting an 800 MHz bandwidth. It also provides 95 dB of channel isolation and crosstalk.
This receiver includes an integrated noise shaping requantizer (NSR) function, which is pin-selectable and allows for improved SNR within a reduced bandwidth. It also features an on-chip 1-to-8 integer clock divider and user-configurable built-in self-test (BIST) capability. Energy-saving power-down modes are also incorporated.
The AD6642BBCZ is available in a 144-ball CSP_BGA package, measuring 10 mm x 10 mm x 1.4 mm, and is designed for surface mount applications. Its LVDS digital output interface is configured for low-cost FPGA families.
| Qty | Low | High |
|---|---|---|
| 1+ | $0.99 | $0.99 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
The AD6642BBCZ has an output data rate of 200 MSPS per channel.
The AD6642BBCZ is an 11-bit receiver.
The typical power consumption is 0.62 W at 185 MSPS.
The AD6642BBCZ operates from a 1.8 V analog supply.
The differential analog inputs have an 800 MHz bandwidth.
The AD6642BBCZ is supplied in a 144-LFBGA, CSPBGA package.