| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
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300 pcs
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300 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
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| Manufacturer Name | |
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| PLL | |
| Voltage |
The Actel A3P125-PQG208 is part of the ProASIC3 family of flash FPGAs, providing a secure, low-power, single-chip solution that is Instant On. This third-generation family offers enhanced performance and density compared to previous generations.
Key technical specifications include up to 1 million system gates, up to 144 Kbits of true dual-port SRAM, and up to 300 user I/Os. The device is built on a 130-nm, 7-layer metal CMOS process and achieves 350 MHz system performance. It supports 1.5 V-only systems and features integrated clock conditioning circuitry with a phase-locked loop (PLL).
For programming and security, the A3P125PQG208 supports In-System Programming (ISP) via JTAG with on-chip 128-bit AES decryption (except for ARM-enabled variants) and includes FlashLock security to protect FPGA contents. The device is housed in a TQFP-2 package.
This FPGA is suitable for designers looking to create high-density systems using existing ASIC or FPGA design flows. Its nonvolatile flash technology ensures it retains its programmed design when powered off.
| Qty | Low | High |
|---|---|---|
| 1+ | $22.15 | $22.15 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
The A3P125-PQG208 FPGA offers up to 1 million system gates.
It features up to 144 Kbits of true dual-port SRAM.
The A3P125-PQG208 achieves 350 MHz system performance.
The A3P125-PQG208 is manufactured using a 130nm, 7-layer metal CMOS process.
The A3P125-PQG208 is available in a TQFP-2 package.
Yes, it supports 1.5 V-only systems.
The A3P125-PQG208 includes FlashLock security to protect FPGA contents and supports on-chip AES decryption via JTAG.