A2F500M3G-1FGG256I

The Microsemi A2F500M3G-1FGG256I is a customizable System-on-Chip (cSoC) FPGA from the SmartFusion family. It integrates a programmable logic matrix, a hard 100 MHz 32-bit ARM Cortex-M3 processor, and programmable analog blocks onto a single chip.

Key features include 500,000 gates of FPGA fabric based on the ProASIC3 technology, 128 Kbytes to 512 Kbytes of embedded nonvolatile flash memory, and 16 Kbytes to 64 Kbytes of embedded high-speed SRAM. The device supports a 10/100 Ethernet MAC with RMII interface, multiple I2C, UART, and SPI peripherals, and a 32-bit watchdog timer. It also includes an 8-channel DMA controller to offload the Cortex-M3 processor.

The analog front-end capabilities include up to three 12-bit SAR ADCs with sample rates up to 600 kSPS and one first-order DAC per ADC with an update rate of 500 kSPS. The device is manufactured using a 130nm, 7-layer metal, flash-based CMOS process, offering nonvolatile, instant-on operation.

Packaged in a 256-ball PBGA, the A2F500M3G-1FGG256I has dimensions of 17 x 17 mm with a 1.0 mm pitch and a height of 1.6 mm. It is suitable for applications requiring a combination of embedded processing, programmable logic, and analog integration.