| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
|
4,000 pcs
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4000 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
| Category | |
| Manufacturer Name | |
| Differential | |
| Differential Output | |
| Frequency | |
| Input | |
| Main Purpose | |
| Mounting Type | |
| Number of Circuits | |
| Operating Temperature | |
| Output | |
| PLL | |
| Ratio | |
| SVHC Present | |
| Supplier Device Package | |
| Voltage |
The Renesas 9DB102BGLFT is a zero delay buffer/fanout IC with an integrated PLL, designed for clock distribution in high-speed systems. It accepts a single differential clock input and provides two differential HCSL outputs with a 1:2 fanout ratio, operating at frequencies up to 101 MHz.
The device features a supply voltage range of 3.135V to 3.465V and an operating temperature range of 0°C to 70°C. The PLL reduces jitter and skew, making it suitable for precision clocking applications. Both input and output paths support differential signaling for improved noise immunity.
The IC is available in a 20-TSSOP surface-mount package measuring 0.173" (4.40mm) wide. It is RoHS3 compliant and has an MSL rating of 1 (unlimited). No external components are required for basic operation.
The supply voltage range is 3.135V to 3.465V.
The device is available in a 20-TSSOP (0.173", 4.40mm Width) package.
The operating temperature range is 0°C to 70°C.
Yes, the part is marked as RoHS3 Compliant (unverified).
The output frequency is 101 MHz.
The input to output ratio is 1:2.
Yes, it includes a Phase-Locked Loop (PLL).