| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
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800 pcs
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800 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
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The Marvell Armada 38X Family 88F6820-A0-BRT4I100 is a high-performance dual CPU system on chip (SoC) designed for demanding applications. It integrates an ARMv7 Cortex-A9 core capable of reaching clock speeds up to 1.866 GHz.
Key electrical specifications include a 32-bit instruction set, support for single/double precision floating-point operations, and both Symmetrical (SMP) and Asymmetrical (AMP) multiprocessing modes. The SoC features a 32 KB L1 instruction cache and a 32 KB L1 data cache, complemented by a substantial 1024 KB unified L2 cache.
Packaged in a TFBGA form factor measuring 17x17 mm with a 0.8 mm ball pitch, this component is suitable for surface mounting. The internal data bus is 64-bit wide, supporting efficient data transfers. The processor also offers endianness options for flexibility in system design.
This system on chip is designed for applications requiring significant processing power and efficient data handling, leveraging its advanced CPU architecture and cache hierarchy for optimal performance.
| Qty | Low | High |
|---|---|---|
| 1+ | $1.69 | $1.69 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
The maximum CPU clock speed for the 88F6820-A0-BRT4I100 is 1.866 GHz.
The 88F6820-A0-BRT4I100 uses the ARMv7 Cortex-A9 CPU architecture.
The L1 instruction cache size is 32 KB.
The L1 data cache size is 32 KB.
The chip features 1024 KB of unified L2 cache.
The package is TFBGA, measuring 17x17 mm with a 0.8 mm ball pitch.
It supports both Symmetrical Multiprocessing (SMP) and Asymmetrical Multiprocessing (AMP) modes.