74LV573D,112

The 74LV573D,112 from NXP Semiconductors is a low-voltage Si-gate CMOS device functioning as an octal D-type transparent latch with 3-state true outputs. It is pin and function compatible with 74HC573 and 74HCT573.

This latch features separate D-type inputs for each latch and a common latch enable (LE) and output enable (OE) input. When LE is HIGH, data at the D inputs enters the latches, making them transparent. When LE is LOW, the latches store the data present at the D inputs. The OE input controls the output state; when LOW, the latch contents are available, and when HIGH, the outputs go to a high-impedance OFF-state.

With a wide operating voltage range from 1.0 V to 5.5 V, this device is optimized for low-voltage applications (1.0 V to 3.6 V). It accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V. The device offers typical output ground bounce of less than 0.8 V and typical HIGH-level output voltage undershoot greater than 2 V at VCC = 3.3 V and Tamb = 25 °C.

The 74LV573D,112 is supplied in a 20-SOIC (0.295", 7.50mm Width) surface mount package. Its inputs and outputs are on opposite sides, facilitating easy interface with microprocessors, making it useful as an input or output port. The operating temperature range is specified from -40°C to +125°C.