| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
|
665 pcs
|
665 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
| Category | |
| Manufacturer Name | |
| SVHC Present |
The 74HC73D is a dual JK flip-flop with reset, featuring negative-edge triggering. It is designed for CMOS low-power dissipation and offers a wide supply voltage range from 2.0 to 6.0 V, ensuring high noise immunity.
This component is specified for operation in temperatures ranging from -40 °C to +125 °C. It includes individual J, K, clock (nCP), and reset (nR) inputs, along with complementary nQ and nQ outputs. The reset input is asynchronous and active LOW, overriding other inputs to force the nQ output LOW and nQ output HIGH.
Available in SO14 and TSSOP14 packages, the 74HC73D is suitable for surface mount applications. Its inputs include clamp diodes, allowing the use of current-limiting resistors for interfacing with voltages exceeding VCC. The device also boasts high latch-up performance exceeding 100 mA per JESD 78 Class II Level B.
| Qty | Low | High |
|---|---|---|
| 1+ | $0.86 | $0.86 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
The supply voltage range is 2V to 6V.
The 74HC73D is available in SO14 and TSSOP14 packages.
The operating temperature range is -40°C to +125°C.
The ESD protection exceeds 2000V HBM and 1000V CDM.
The latch-up performance exceeds 100mA per JESD 78 Class II Level B.