| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
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10,000 pcs
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10000 pcs | On Request | 1 | On Request | On Request | 16+ | On Request | On Request |
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| Halogen Free | |
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The 74AUP1G34FS3-7 is a single buffer gate designed for low power applications, featuring the Advanced Ultra Low Power (AUP) CMOS logic family. It supports a supply voltage range from 0.8V to 3.6V and provides a standard push-pull output with ±4mA drive at 3.0V.
This device is fully specified for partial power-down applications using I OFF circuitry, which prevents damaging current backflow when the device is powered down. The gate performs a positive Boolean function and includes Schmitt Trigger action at the input, making it tolerant of slower input rise and fall times with typical hysteresis of 250mV at VCC = 3.0V.
Key features include low static power consumption (ICC < 0.9µA) and low dynamic power consumption (CPD = 6.3pF typical). It offers robust ESD protection, exceeding JESD 22 standards for Human Body Model (2000-V) and Charged Device Model (1000-V), and meets JESD 78 Class I for latch-up resistance.
The 74AUP1G34FS3-7 is available in leadless packages such as X2-DFN0808-4 and is suitable for battery-powered devices and portable electronics like tablets, smartphones, and cameras.
| Qty | Low | High |
|---|---|---|
| 1+ | $1.20 | $1.20 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
0.8V to 3.6V
X2-DFN0808-4 and 4-XFDFN Exposed Pad
-40°C to 125°C (TA)
< 0.9µA
2000V
±4mA
250mV