| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
|
1,965 pcs
|
1965 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
| Category | |
| Manufacturer Name | |
| Differential | |
| Divider | |
| Frequency | |
| Input | |
| Mounting Type | |
| Number of Circuits | |
| Operating Temperature | |
| Output | |
| PLL | |
| Ratio | |
| Supplier Device Package | |
| Type | |
| Voltage |
The Renesas 601R-25LF is a clock/frequency synthesizer designed for generating multiple clock outputs from a single input. It features a Phase-Locked Loop (PLL) for frequency multiplication and jitter reduction. The device accepts either a clock or crystal input and provides five CMOS outputs with a 1:5 ratio.
Key electrical specifications include a maximum output frequency of 156 MHz, a supply voltage range of 2.97V to 3.63V, and an operating temperature range of 0°C to 70°C. The device includes dividers on both input and output paths and is non-differential.
The 601R-25LF is packaged in a 20-SSOP (0.154", 3.90mm Width) surface-mount package, also referred to as a 20-QSOP supplier device package. It is suitable for applications requiring multiple synchronized clock signals, such as in networking, computing, and communications equipment.
The supply voltage range is 2.97V to 3.63V.
It is available in a 20-SSOP (0.154", 3.90mm Width) surface-mount package, also designated as 20-QSOP.
The operating temperature range is 0°C to 70°C.
The RoHS status is listed as RoHS3 Compliant, but this is unverified.
The maximum output frequency is 156 MHz.
Yes, it includes a Phase-Locked Loop.
The output is CMOS.