| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
|
924 pcs
|
924 pcs | On Request | 1 | On Request | On Request | 1649 | On Request | On Request |
| Category | |
| Manufacturer Name | |
| Differential | |
| Divider | |
| Frequency | |
| Input | |
| Mounting Type | |
| Number of Circuits | |
| Operating Temperature | |
| Output | |
| PLL | |
| Ratio | |
| SVHC Present | |
| Supplier Device Package | |
| Type | |
| Voltage |
The Renesas 2510CGLFT is a clock driver IC that integrates a Phase-Locked Loop (PLL) with bypass capability, fanout distribution, and spread spectrum clock generation. It accepts a single clock input and provides ten CMOS outputs with a 1:10 ratio. The device operates over a supply voltage range of 2.97V to 3.63V and can generate output frequencies up to 175 MHz.
This component is designed for surface-mount assembly in a 24-TSSOP package (0.173" width, 4.40mm). It is rated for commercial operating temperatures from 0°C to 70°C. The PLL can be bypassed if needed, offering flexibility in system clocking schemes.
Typical applications include clock distribution in computing, networking, and telecommunications equipment where low-skew, low-jitter clock signals are required. The 1:10 fanout allows a single clock source to drive multiple loads without additional buffering.
2.97V to 3.63V.
24-TSSOP (0.173", 4.40mm Width).
0°C to 70°C.
Yes, RoHS3 Compliant (unverified).
175 MHz.
1:10.
Yes, with bypass.