| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
|
8,777 pcs
|
8777 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
| Category | |
| Manufacturer Name | |
| Differential | |
| Divider | |
| Frequency | |
| Input | |
| Mounting Type | |
| Number of Circuits | |
| Operating Temperature | |
| Output | |
| PLL | |
| Ratio | |
| SVHC Present | |
| Supplier Device Package | |
| Type | |
| Voltage |
The 2309A-1HDCG is a zero delay buffer integrated circuit from Renesas Electronics. It is designed to provide clock distribution with low skew and zero delay. The device includes a phase-locked loop (PLL) with bypass capability, allowing for flexible operation. It accepts LVTTL input and provides LVTTL outputs with a 1:9 input-to-output ratio. The maximum operating frequency is 133 MHz. The supply voltage range is 3V to 3.6V.
The PLL can be bypassed for applications requiring direct clock buffering without delay adjustment. The circuit operates over a temperature range of 0°C to 70°C. It is suitable for use in various clock distribution systems.
The device is offered in a 16-SOIC surface mount package with a width of 3.90mm. It is designed for surface mount assembly and is RoHS3 compliant (unverified).
3V to 3.6V.
16-SOIC (0.154", 3.90mm Width) surface mount.
0°C to 70°C.
RoHS3 Compliant (unverified, low confidence).
Yes, with bypass capability.
LVTTL input and output.
133 MHz.