| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
|
193 pcs
|
193 pcs | On Request | 1 | On Request | On Request | 0031+ | On Request | On Request |
| Category | |
| Manufacturer Name |
The SiRFstarIIe chip set, part number 1540-0005 from SIRF, is a highly integrated GPS solution for consumer products. It builds upon the SiRFstarI core, incorporating an acquisition accelerator, differential GPS processor, multipath mitigation hardware, and a satellite-tracking engine.
Key architectural highlights include industry-leading GPS performance with 1920 time/frequency search channels, support for Wide Area Augmentation System (WAAS) and U.S. Coast Guard Beacon, and a satellite signal-tracking engine that operates without CPU intervention. It also features multipath-mitigation hardware and a cold start time of under 45 seconds.
The chip set is designed for low power consumption, with an advanced TricklePower mode offering power savings up to 98% and an extreme low power mode for power-down states with fast start-up capabilities. It maximizes GPS position availability with features like SingleSatTM updates in reduced visibility and superior urban canyon performance.
The SiRFstarIIe family includes the GSP2e digital section with an integrated ARM7TDMI CPU up to 50 MHz, supporting 16 and 32-bit data bus operations, on-chip 1Mb EDO DRAM, and extensive GPS receiver peripherals. The GRF2i RFIC provides cost-effective RF front-end functionality with an on-chip VCO and reference oscillator. The GSW2 modular software ensures easy integration into existing systems, offering 90% CPU throughput for user tasks.
| Qty | Low | High |
|---|---|---|
| 1+ | $1.00 | $1.00 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
The SiRFstarIIe chip set features an integrated ARM7 CPU running at up to 50 MHz.
The cold start time for the SiRFstarIIe chip set is under 45 seconds.
The SiRFstarIIe chip set supports both 16-bit and 32-bit data bus operations.
The SiRFstarIIe chip set has 1Mb of EDO DRAM for internal RAM.
The SiRFstarIIe chip set has 1920 time/frequency search channels.